@celox-sim/celox / index / ModuleDefinition

Interface: ModuleDefinition<Ports>

Defined in: packages/celox/src/types.ts:26

A compiled module descriptor emitted by celox-gen-ts. The type parameter Ports carries the generated port interface (e.g. AdderPorts) so that Simulator.create(Adder) returns a correctly-typed DUT accessor.

Type Parameters

Ports

Ports = Record<string, unknown>

Properties

__celox_module

readonly __celox_module: true

Defined in: packages/celox/src/types.ts:27

---

__ports?

readonly optional __ports: Ports

Defined in: packages/celox/src/types.ts:37

Phantom field — never set at runtime. Carries the Ports type.

---

defaultOptions?

readonly optional defaultOptions: SimulatorOptions

Defined in: packages/celox/src/types.ts:35

Default options baked in by the Vite plugin (e.g. via ?dse= query).

---

events

readonly events: string[]

Defined in: packages/celox/src/types.ts:31

---

name

readonly name: string

Defined in: packages/celox/src/types.ts:28

---

ports

readonly ports: Record<string, PortInfo>

Defined in: packages/celox/src/types.ts:30

---

projectPath?

readonly optional projectPath: string

Defined in: packages/celox/src/types.ts:33

Absolute path to the Veryl project directory (set by Vite plugin).

---

sources

readonly sources: readonly SourceFile[]

Defined in: packages/celox/src/types.ts:29